Design Optimizations for Tiled Partially Reconfigurable Systems
نویسندگان
چکیده
منابع مشابه
Tutorial on Macro Design for Dynamic and Partially Reconfigurable Systems
Xilinx Virtex FPGAs offer the possibility of dynamic and partial run-time reconfiguration. This feature enables the substitution of an architecture within a configuration area on the chip. The benefit is, that architecture can be adapted to the actual demand of an application while runtime. High performance, flexibility and adaptivity of these devices raise the interest in academic research and...
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ژورنال
عنوان ژورنال: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
سال: 2011
ISSN: 1063-8210,1557-9999
DOI: 10.1109/tvlsi.2010.2044902